This invention relates generally to the field of charge pumps, and more particularly, to a comparative circuit.
This application relates to the subject matter disclosed in the following United States Patents Applications:
U.S. patent application Ser. No. 09/760,071, entitled xe2x80x9cVoltage Divider Circuit,xe2x80x9d filed Jan. 10, 2001; and
U.S. patent application Ser. No. 09/760,108, entitled xe2x80x9cOscillator Circuit,xe2x80x9d filed Jan. 10, 2001.
The above patents are assigned to the present Assignee and are incorporated herein by reference.
Many integrated circuit (IC) devices, such as non-volatile memories, include a high-voltage generator for generating a voltage (VPP) having a value greater than the supply voltage (VDD). According to previously developed techniques, such a high voltage generator typically employs a charge pump driven by a free-running oscillator in conjunction with a voltage regulator. The oscillator may be implemented as a closed ring of an odd-number (e.g., seven or nine) of inverter stages. The voltage regulator limits the maximum voltage value for VPP by comparing itxe2x80x94for example, via a resistance voltage divider circuitxe2x80x94to a fixed reference voltage. When the divider voltage exceeds the reference voltage, a shunt-IPP current path is established to pull down VPP until the comparator balance of the voltage regulator is satisfied.
Such previously developed techniques utilizing current-shunting to regulate VPP are generally wasteful and inefficient. For example, although it is often desirable to have a rise time for VPP in the range of tens to hundreds of microseconds, the current shunting technique relies on shunting away pump current in excess of that required to charge load capacitance at the desired rate. In addition, the oscillator used to drive the charge pump expends large amounts of voltage supply current IDD (typically in the range of 2-5 mA), converting it to pump-output current IPP, usually at very low efficiency (IPP/IDD). Furthermore, because the time delay of the inverter ring of a typical oscillator is designed to produce the minimum frequency necessary for the charge pump to reach the desired VPP under all possible conditions for voltage, temperature, and process, this minimum frequency is generally set to a value sufficiently high (e.g., in the range of 2-15 MHz) to ensure adequate control by the shunt regulator. For many sets of conditions, however, this minimum frequency produces current greatly in excess of functional circuit requirements, drawing higher supply current than is necessary.
The disadvantages and problems associated with previously developed techniques for generating and regulating the output of a high voltage generator have been substantially reduced or eliminated using the present invention.
According to one embodiment of the present invention, a charge pump system includes a charge pumping circuit for outputting a high voltage VPP at a node. An oscillator circuit, coupled to the charge pumping circuit, drives the charge pumping circuit with at least one clock signal. A current source generates a pulldown current. A capacitor voltage divider circuit is coupled between the node and the current source. The voltage divider circuit cooperates with the current source to form a feedback loop for controlling the oscillator circuit to run at variable, optimum frequency for controlling the rate-of-rise and the amplitude of the high voltage VPP.
According to another embodiment of the present invention, an oscillator circuit includes a current mirror which receives a control signal and generates an output current signal in response. An inverter is coupled to the current mirror. A capacitor receives the output current signal of the current mirror through the inverter. A NOR gate receives the voltage developed across the capacitor and generates a clock signal.
According to yet another embodiment of the present invention, a voltage divider circuit includes a first capacitor coupled to a first node at which a high voltage VPP appears. A second capacitor is coupled in series to the first capacitor at a second node, and a third capacitor is coupled in series to the second capacitor at a third node. A source follower, coupled to the second node, translates a voltage at the second node to a voltage having a value of approximately one-half VPP.
According to still yet another embodiment of the present invention, a comparator circuit includes a first source follower which follows a supply voltage VDD. A second source follower follows a high voltage VPP. A current mirror is coupled to the first and second source followers. The current mirror pulls the voltage at a node to a first value if the high voltage VPP is approximately equal to the supply voltage VDD, and pulls the voltage at the node to a second value if the high voltage VPP is greater than the supply voltage VDD, thereby comparing the high voltage VPP to the supply voltage VDD without drawing current from the high voltage VPP.
A technical advantage of the present invention includes providing a charge pump system which outputs a VPP with high voltage value and yet requires a minimal amount of supply current (IDD) (e.g., less than 50 uA).
Other aspects and advantages of the present invention will become apparent from the following descriptions and accompanying drawings.